DIV2: Power-of-two clock divider (4HP)

An updated version of my original clock divider.

Most of the changes are under the hood. so the module doesn't look outwardly different from its predecessor save for the black faceplate.

This is a simple power-of-two clock divider which you can use to create slower tempos from a base clock signal (the original intended use-case) - each stage will reduce the frequency of the input clock by a factor of 2, down to a maximum of /64. It can also be used as a binary counter or a 6-bit ADC(!)

Note that unlike some clock divider modules, this one triggers on the rising edge of the clock pulse (the CD4040 clocks on the falling edge by default) - this means that your divided clock will not be half a step out of sync with the 'master' clock. That being said, the CD4040 requires a clean transition between low and high states - for best results, use a sharp, well-defined square wave as the clock signal.

An LFO or VCO will generally do the trick providing the output amplitude is greater than around 2V. If there's any significant 'slope' in the leading edge of the pulse then triggering will be erratic (TL;DR - don't try and clock it with triangle or sawtooth waves)

4HP wide - supplied with power cable and mounting hardware